*******************************************************************************
* *
* Bugcheck Analysis *
* *
*******************************************************************************
Use !analyze -v to get detailed debugging information.
BugCheck 9C, {0, f771b050, f2000840, 800}
Probably caused by : intelppm.sys ( intelppm!AcpiC1Idle+12 )
Followup: MachineOwner
---------
1: kd> !analyze -v
*******************************************************************************
* *
* Bugcheck Analysis *
* *
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MACHINE_CHECK_EXCEPTION (9c)
A fatal Machine Check Exception has occurred.
KeBugCheckEx parameters;
x86 Processors
If the processor has ONLY MCE feature available (For example Intel
Pentium), the parameters are:
1 - Low 32 bits of P5_MC_TYPE MSR
2 - Address of MCA_EXCEPTION structure
3 - High 32 bits of P5_MC_ADDR MSR
4 - Low 32 bits of P5_MC_ADDR MSR
If the processor also has MCA feature available (For example Intel
Pentium Pro), the parameters are:
1 - Bank number
2 - Address of MCA_EXCEPTION structure
3 - High 32 bits of MCi_STATUS MSR for the MCA bank that had the error
4 - Low 32 bits of MCi_STATUS MSR for the MCA bank that had the error
IA64 Processors
1 - Bugcheck Type
1 - MCA_ASSERT
2 - MCA_GET_STATEINFO
SAL returned an error for SAL_GET_STATEINFO while processing MCA.
3 - MCA_CLEAR_STATEINFO
SAL returned an error for SAL_CLEAR_STATEINFO while processing MCA.
4 - MCA_FATAL
FW reported a fatal MCA.
5 - MCA_NONFATAL
SAL reported a recoverable MCA and we don't support currently
support recovery or SAL generated an MCA and then couldn't
produce an error record.
0xB - INIT_ASSERT
0xC - INIT_GET_STATEINFO
SAL returned an error for SAL_GET_STATEINFO while processing INIT event.
0xD - INIT_CLEAR_STATEINFO
SAL returned an error for SAL_CLEAR_STATEINFO while processing INIT event.
0xE - INIT_FATAL
Not used.
2 - Address of log
3 - Size of log
4 - Error code in the case of x_GET_STATEINFO or x_CLEAR_STATEINFO
AMD64 Processors
1 - Bank number
2 - Address of MCA_EXCEPTION structure
3 - High 32 bits of MCi_STATUS MSR for the MCA bank that had the error
4 - Low 32 bits of MCi_STATUS MSR for the MCA bank that had the error
Arguments:
Arg1: 00000000
Arg2: f771b050
Arg3: f2000840
Arg4: 00000800
Debugging Details:
------------------
NOTE: This is a hardware error. This error was reported by the CPU
via Interrupt 18. This analysis will provide more information about
the specific error. Please contact the manufacturer for additional
information about this error and troubleshooting assistance.
This error is documented in the following publication:
- IA-32 Intel(r) Architecture Software Developer's Manual
Volume 3: System Programming Guide
Bit Mask:
MA Model Specific MCA
O ID Other Information Error Code Error Code
VV SDP ___________|____________ _______|_______ _______|______
AEUECRC| | | |
LRCNVVC| | | |
^^^^^^^| | | |
6 5 4 3 2 1
3210987654321098765432109876543210987654321098765432109876543210
----------------------------------------------------------------
1111001000000000000010000100000000000000000000000000100000000000
VAL - MCi_STATUS register is valid
Indicates that the information contained within the IA32_MCi_STATUS
register is valid. When this flag is set, the processor follows the
rules given for the OVER flag in the IA32_MCi_STATUS register when
overwriting previously valid entries. The processor sets the VAL
flag and software is responsible for clearing it.
OVER - Error Overflow
Indicates that a machine check error occurred while the results of a
previous error were still in the error-reporting register bank (that
is, the VAL bit was already set in the IA32_MCi_STATUS register).
the processor sets the OVER flag and software is responsible for
clearing it. Enabled errors are written over disabled errors, and
uncorrected errors are written over corrected errors. Uncorrected
errors are not written over previous valid uncorrected errors.
UC - Error Uncorrected
Indicates that the processor did not or was not able to correct the
error condition. When clear, this flag indicates that the processor
was able to correct the error condition.
EN - Error Enabled
Indicates that the error was enabled by the associated EEj bit of the
IA32_MCi_CTL register.
PCC - Processor Context Corrupt
Indicates that the state of the processor might have been corrupted
by the error condition detected and that reliable restarting of the
processor may not be possible.
BUSCONNERR - Bus and Interconnect Error BUS{LL}_{PP}_{RRRR}_{II}_{T}_err
These errors match the format 0000 1PPT RRRR IILL
Concatenated Error Code:
--------------------------
_VAL_OVER_UC_EN_PCC_BUSCONNERR_0
This error code can be reported back to the manufacturer.
They may be able to provide additional information based upon
this error. All questions regarding STOP 0x9C should be
directed to the hardware manufacturer.
BUGCHECK_STR: 0x9C_GenuineIntel
CUSTOMER_CRASH_COUNT: 2
DEFAULT_BUCKET_ID: DRIVER_FAULT
PROCESS_NAME: Idle
LAST_CONTROL_TRANSFER: from 80703bff to 8053738a
STACK_TEXT:
f771b028 80703bff 0000009c 00000000 f771b050 nt!KeBugCheckEx+0x1b
f771b154 806fec52 f7717d70 00000000 00000000 hal!HalpMcaExceptionHandler+0xdd
f771b154 baf92062 f7717d70 00000000 00000000 hal!HalpMcaExceptionHandlerWrapper+0x4a
f78b2d50 804dcbef 00000000 0000000e 0f0f0f0f intelppm!AcpiC1Idle+0x12
f78b2d54 00000000 0000000e 0f0f0f0f 0f0f0f0f nt!KiIdleLoop+0x10
STACK_COMMAND: kb
FOLLOWUP_IP:
intelppm!AcpiC1Idle+12
baf92062 6a00 push 0
SYMBOL_STACK_INDEX: 3
SYMBOL_NAME: intelppm!AcpiC1Idle+12
FOLLOWUP_NAME: MachineOwner
MODULE_NAME: intelppm
IMAGE_NAME: intelppm.sys
DEBUG_FLR_IMAGE_TIMESTAMP: 41107b37
FAILURE_BUCKET_ID: 0x9C_GenuineIntel_intelppm!AcpiC1Idle+12
BUCKET_ID: 0x9C_GenuineIntel_intelppm!AcpiC1Idle+12
Followup: MachineOwner
---------
